The present invention generally relates to methods for fabricating integrated circuit and semiconductor devices and the resulting structures. More particularly, the present invention relates to metal-oxide-silicon (MOS) transistor devices for use in memory arrays, methods for making the same, and semiconductor devices containing the same.
One common device in integrated circuits (ICs) is a MOS transistor, such as those described in U.S. Pat. Nos. 5,658,811, 5,585,302, 5,668,394, 5,633,522, 5,567,647, 5,605,854, and 5,627,393, the disclosures of which are incorporated herein by reference. One type of MOS transistor, a MOS field-effect-transistor (MOSFET), can be characterized in one manner as either "buried channel" or "surface channel" depending on the location of the channel. In surface channel (SC) devices, the channel is located near the surface of the substrate where the gate oxide of the transistor is disposed, generally at a depth of about 100 .ANG.. In buried channel (BC) devices, the channel is located deeper in the substrate and further away from the gate oxide, generally at a depth of about 1000 .ANG..
The performance of buried-channel and surface-channel MOSFET devices also differs. For example, the mobility of carriers (holes or electrons) in buried channels is about 15% higher than carriers in surface channels. Unfortunately, the advantages of BC MOSFETs are often outweighed by some of their disadvantages. As the size of MOSFET devices shrinks and gate lengths become smaller, the breakdown voltage (BVdSS) from the drain to the source, as well as control of the threshold voltage (V.sub.t) in BC MOSFET devices become worse, as described in pages 294-303 of Silicon Processing For The VLSI Era by Wolf et al., the disclosure of which is incorporated herein by reference.
To better control BVdSS and V.sub.t as device dimensions shrink, SC MOSFET devices have begun replacing BC MOSFET devices. SC MOSFET devices are easy to fabricate with salicide processes since the implanting step used to form the source and drain regions also implants the polysilicon gate. SC MOSFET devices, however, typically operate with a dual-gate operation that can require either a thick oxide layer during fabrication so p-dopants (such as boron) do not diffuse quickly into the surrounding areas and destroy the device performance or a hardened thin oxide layer where nitrogen is incorporated into the oxide layer. As device dimensions of SC MOSFET devices shrink into the submicron dimensions, these oxide layers unfortunately become too thin to prevent this out-diffusion of boron. Moreover, the fabrication processes for SC MOSFET devices often require additional masking steps during implantation of the channels, making manufacture more complex and costly.